1. Field of the Invention
This invention relates to the field of semiconductor processing and, more particularly, to a method of forming a via having a lateral dimension (diameter) less than the minimum resolvable feature size of the photolithography exposure device using non-oxide spacers.
2. Description of the Relevant Art
An integrated circuit includes a large number of transistors formed into a monolithic semiconductor substrate, typically comprising silicon. Isolation structures such as field oxides or shallow trench dielectrics are used to electrically isolate each individual transistor. Individual transistors are thereafter selectively coupled to other transistors to achieve a desired function. In many processes, the selective coupling or interconnecting of individual transistors is accomplished by depositing an insulating material such as a dielectric upon the wafer, forming via structures in desired locations through the use of conventional photolithography and etch techniques, and forming a conductive layer on the upper surface of the insulating material. The conductive layer will fill the via and can be patterned to selectively couple specified transistor terminals to achieve the desired function. This process of forming a conductive layer on an insulating layer containing a plurality of via is commonly repeated such that the device contains multiple interconnect levels and multiple interlevel dielectric layers. Multiple level interconnects enable greater functional complexity and can reduce the average length of the interconnects thereby minimizing the RC delay imposed by the interconnects. The lateral dimension is typically smaller than the lateral dimension of the interconnects to ensure that the via opening does not overlap or extend via on the interconnect line. If the via opening is larger than the interconnect, the via etch process may proceed through the dielectric layer upon which the interconnect is formed. This is typically an undesirable result. Thus, as interconnect critical dimensions drop below the sub-0.5 micron region, the critical dimensions of the via must shrink to even smaller dimensions.
The main limitation of minimum feature size in a semiconductor process is the resolution of the optical lithography printing system. In an optical lithography printing system, radiation is directed from an illumination source through a patterned mask and onto a photoresist layer. The patterned mask transmits the illumination source radiation onto selected areas of the photoresist layer to reproduce the mask pattern in the photoresist layer. Resolution in optical lithography systems is limited by diffraction effects, which spread radiation from the illumination source into regions of the photoresist which are not directly exposed to the illumination source. Because of diffraction effects, there is a minimum distance beyond which even a geometrically perfect lens cannot resolve two points. In other words, when two points are less than a minimum distance from each other, the two points cannot be resolved by the lithography system. The diffraction patterns associated with each point overlap each other to such an extent that the two points cannot be effectively differentiated. The resolution of a lens depends on the wavelength of the illumination source and the numerical aperture of the lens. Rayleigh's criteria define two images as being resolvable when the intensity between them drops to 80% of the image intensity. These criteria are satisfied when the 2d=0.61 .lambda./NA, where 2d is the separation distance of two images, .lambda. is the wavelength of the energy source, and NA is the numerical aperture of the lens.
Commercially available optical photolithography machines are almost universally equipped with mercury vapor lamps as the illumination source. The characteristic energy spectrum of a mercury vapor lamp contains several distinct peaks in the 300# nm to 450# nm wavelength range. These peaks are commonly referred to by their industry designations. The peak associated with a wavelength of .sup..about. 450# nm is designated the "G-line," the .sup..about. 405# nm peak the "H-line," and the .sup..about. 365# nm peak the "I-line." Photolithography aligners are similarly designated such that it is common to speak of "G-line aligners." The minimum feature size resolvable by a G-line aligner is greater than the minimum feature size resolvable by an I-line aligner because of the longer G-line wavelength. In addition, "deep UV" aligners utilize energy having wavelengths of 248 nm and 193 nm to achieve better resolution than is achievable with I-line aligners.
As process technologies approach and surpass the resolvable limits of optical aligners, semiconductor manufacturers are forced to implement alternative photolithography techniques to achieve adequate resolution of the minimum features. Unfortunately, the conventional alternatives involve abandoning or substantially modifying the existing photolithography equipment at a prohibitive cost. Many wafer fabrication facilities, for example, have extensive capital investment in G-line aligners. To adequately resolve features in the submicron range, it is typically necessary to upgrade these aligners so that they can operate in the I-line region. Similarly, fabrication facilities with having an extensive investment in I-line aligners will eventually need to upgrade to deep UV aligners or abandon the optical alignment equipment entirely and replace it with advanced lithography equipment including e-beam or x-ray lithography. The cost associated with replacing or upgrading G-line and I-line photolithography equipment can be staggering. In addition to the capital required to purchase and install the improved equipment, there are extensive costs associated with qualifying the new equipment for production worthiness and training production and maintenance personnel in the operation and care of the new equipment. Similarly, in fabrication facilities that have an extensive investment in I-line aligners, the cost of abandoning these aligners to achieve smaller feature sizes is tremendous. Therefore, it is highly desirable to implement a manufacturing process that can extend the useful life of existing photolithography equipment by permitting the reproducible fabrication of via having critical dimensions that are smaller than the minimum resolvable feature of the photolithography equipment.